All
Term | Definition |
---|---|
ATE |
Automatic Test Equipment Any machine which performs tests automatically. |
ATPG |
ATPG (acronym for both Automatic Test Pattern Generation and Automatic Test Pattern Generator) is an electronic design automation method/technology used to find an input (or test) sequence that, when applied to a digital circuit, enables testers to distinguish between the correct circuit behavior and the faulty circuit behavior caused by defects. |
Back-End (BE) |
In the semiconductor industry, Back End corresponds to the second phase of manufacturing during which the silicon chip is mounted in a package designed (assembly) not only to protect it, but also to provide external connections via a series of very fine wires, followed by testing, assembling, finishing and packing. Note: this is different from BEOL expression |
BEOL |
Back-End Of Line - group of all steps in the semiconductor fab after contact, including all metal layer, up to the PADS creation. Note: not to confused with the general term "Back-End (BE)" referencing to the packaging, BEOL is actually part of the "Front-End (FE)" phase of semiconductor manufacturing |
CAD |
Computer Aided Design Software and hardware tools that allow graphic design. It assists in the design of a product and in the verification of its performance by simulation. |
CW-LVP |
Continuous Wave Laser Voltage Probing - is a specific LVP solution |
DFT |
Design for Test (aka "Design for Testability" or "DFT") is a name for design techniques that add certain testability features to a microelectronic hardware product design. It is used both for production validation as for design debug. It is translating in practice in introducing "scan chain" |
DLS |
Dynamic Laser Stimulation- Group of techniques using LSM technology, based on Dynamic stimulation of the device, i.e. running test sequence. |
DUT |
Device Under Test - name used for device being characterized in Electrical Failure Analysis |
EBAC |
Electron Beam Absorbed Current |
EBIC |
Electron Beam Induced Current (EBIC) is a semiconductor analysis technique performed in a scanning electron microscope (SEM).EBIC is performed by measuring the induced current from e-Beam stimulation. NanoProbing solution in SEM enable such solution |
EFA |
Electrical Failure Analysis - part of the Global Fault Isolation - aiming to identify fault localization on chip from electrical simulation of the device |
EMMI |
Emission Microscopy - Technique used in Electrical Failure Analysis - Other name can be seen: PEM, Photo Emission Microscopy |
ESD |
ElectroStatic Discharge |
FEOL |
Front-End Of Line - group of all steps in the semiconductor fab from bare silicon till completion of the gates - prior to all metal line (being BEOL steps). |