Design Debug

Probing your device for design & timing analysis

Enabling Timing analysis for 32nm – adapting solution to your technology

Timing analysis enables design debug or failure analysis. Advanced probing requirements are :

• Advanced resolution of the probe– to differentiate which gate is being probed

• Advanced timing analysis, short raise time, large bandwidth – from just test sequence validation to the most advance rise time analysis

• Advanced sensitivity – to adapt to the smallest Vdd

• Advanced resolution for imaging & ease of use CAD navigation – to correlate accuratly probing and to the required design location

Whereas Time Resolved Emission ( TRE) technique, through well proven platform (Emiscope), is now being upgraded to 32nm resolution capabilities, Laser Voltage Probing ( LVP) technology (RUBY) enables faster timing rise analysis (down to 10ps), lower voltage analysis.

In Addition, LVx option available across Emiscope & Meridian IV enable extending capability your current system with design debug solution